{"id":30567,"date":"2026-03-12T09:18:10","date_gmt":"2026-03-12T09:18:10","guid":{"rendered":"https:\/\/www.europesays.com\/ch\/30567\/"},"modified":"2026-03-12T09:18:10","modified_gmt":"2026-03-12T09:18:10","slug":"switzerland-hosts-cern-of-semiconductor-research","status":"publish","type":"post","link":"https:\/\/www.europesays.com\/ch\/30567\/","title":{"rendered":"Switzerland hosts \u2018CERN of semiconductor research\u2019"},"content":{"rendered":"

\"Universities<\/p>\n

Universities use open-source technology to design chips <\/p>\n

Keystone \/ Laurent Gillieron <\/p>\n

Switzerland is fostering an open-source movement that frees universities and chip designers from the commercial shackles of monopolistic companies.\n<\/p>\n

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March 12, 2026 – 09:08\n<\/p>\n

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\n I write about the rapidly evolving artificial intelligence technology and its possible impacts on society.
\nOriginally from England, I spent some time at the BBC in London before moving to Switzerland to join SWI swissinfo.ch. <\/p>\n


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The frenetic rise of artificial intelligence has put hefty new demands on the semiconductor industry. Supercomputers and data centres are hungry for more advanced specialised chips.<\/p>\n

This has given a boost to universities, like the Swiss federal institutes of technology, which are working to design next generation semiconductors. But the research and production of these chips is hampered by restrictions on what\u2019s called \u2018Instruction Set Architecture\u2019 (ISA).<\/p>\n

ISA are essentially translators that determine how chips interact with software. And the most common ISAs are controlled by the American company Intel and the British firm ARM. The companies charge fees to work within their ISA systems and restrict how they can be adapted for new chip designs.<\/p>\n

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\"A<\/p>\n

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Research frontiers\n <\/p>\n

How semiconductors are made <\/p>\n

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This content was published on <\/p>\n

Aug 4, 2025 <\/p>\n

Making semiconductor chips for computers, machinery, transport and other devices is a costly and a lengthy process. How exactly is it done? <\/p>\n

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Read more: How semiconductors are made
\n <\/a><\/p>\n

The answer to this dilemma is an open-source ISA called RISC-V, which was developed at the University of California, Berkeley, in 2010. The technology was transferred to a non-profit foundation in 2015, which moved from the United States to Zurich in 2020 as the RISC-V International Association.<\/p>\n

\u2018Freedom to operate\u2019 in semiconductor research\u00a0<\/p>\n

The Swiss federal technology institute ETH Zurich was a founding member of the association in 2015. The open-source alternative \u201ccreates an infrastructure to innovate,\u201d according to Luca Benini, professor of the department of information technology and electrical engineering.<\/p>\n

\u201cAcademics are essentially blocked from designing or adapting processors on proprietary ISAs,\u201d he told Swissinfo. \u201cYou need explicit permission from the ISA owner. We moved to open-source ISA to give us freedom to operate.\u201d<\/p>\n

This has enabled ETH researchers to develop some 75 chips over the course of the last ten years. Switzerland does not compete head-to-head with countries like Taiwan, the United States and China, which have large chip manufacturing facilities. Instead, the Alpine nation focuses on niche areas, such as designing ultra-low-power semiconductors that use less energy.<\/p>\n

\u201cWe have designed RISC-V processors specialised for machine learning and inference and for LLM training,\u201d said Benini. \u201cWe have been able to demonstrate 100-fold efficiency gains, which is a once-in-a-generation improvement.\u201d<\/p>\n

This is imperative in an era when AI and expanding data centres are consuming more electricity. The semiconductor industry is \u201crefining each part of the process, reducing unnecessary computation and optimising to be more energy efficient,\u201d Alain-Serge Porret, vice-president, Integrated & Wireless Systems at the Swiss Technology Innovation Center (CSEM), wrote in a post in the Semiwiki website.<\/p>\n

\u201cEven leading companies that once championed aggressive scale are now looking how to properly size chips for the energy realities of today,\u201d he added.<\/p>\n

The public-private innovation agency CSEM was set up in the early 1980s by the Swiss government to collaborate between academic institutions and industry to ensure that Switzerland keeps pace with developments in technology.<\/p>\n

The centre\u2019s semiconductor research has flourished under the RISC-V umbrella. CSEM started developing processors with its own ISA but found the task of managing and maintaining the whole ecosystem time-consuming.<\/p>\n

This requires a team of developers to keep the architecture updated and bug-free plus support services for companies applying the technology in their businesses.<\/p>\n

Assigning this task to an open-source community has freed resources for research and innovation, said St\u00e9phane Emery, head of CSEM\u2019s system-on-a-chip group. RISC-V brings together more than 4,500 academic institutions and companies such as Google, Huawei, Siemens and Sony, under one roof.<\/p>\n

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\"AI<\/p>\n

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Swiss AI\n <\/p>\n

How Switzerland could shape the chip industry\u2019s power balance <\/p>\n

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Mar 12, 2026 <\/p>\n

Swiss-based RISC-V open-source movement frees chip designers from extra cost and restrictions. <\/p>\n

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Read more: How Switzerland could shape the chip industry\u2019s power balance
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The group works together to maintain and strengthen the ISA by adding new applications and ratifying new extensions to the architecture.<\/p>\n

\u201cIt is important for academic research because we can exchange ideas with other universities and companies worldwide. It\u2019s a very active ecosystem that is constantly evolving,\u201d he said.<\/p>\n

Resources freed by open-source approach\u00a0<\/p>\n

CSEM has commercial links with several global brands, including a project to develop an ultra-low power chip for smartphones and tablets with the multinational United Semiconductor Japan (formerly known as Fujitsu).<\/p>\n

The Swiss Federal Institute of Technology Lausanne (EPFL) has leveraged RISC-V for its own research projects as well. This includes the X-HEEP open-source microcontroller, which allows researchers to build and test energy-efficient embedded systems for ultra-low power edge computing, Internet of Things applications and biomedical wearables.<\/p>\n

The open-source RISC-V ecosystem is vital for academic research institutions in Switzerland, according to Benini.<\/p>\n

Benini compares it to CERN, where physicists can test their theories using the particle accelerator. \u201cRISC-V plays a similar role as a research infrastructure for computing systems. It\u2019s a very important asset that enables research in software and specialised hardware to reach the outside world in a concrete form,\u201d he said.<\/p>\n

The CERN of semiconductors\u00a0<\/p>\n

CSEM has commercial links with several global brands, including a project to develop an ultra-low power chip for smartphones and tablets with the multinational United Semiconductor Japan (formerly known as Fujitsu).\u00a0<\/p>\n

The Swiss Federal Institute of Technology Lausanne (EPFL) has\u00a0leveraged\u00a0RISC-V for its own research projects as well. This includes the X-HEEP open-source microcontroller, which allows researchers to build and test energy-efficient embedded systems for ultra-low power edge computing, Internet of Things applications and biomedical wearables.\u00a0<\/p>\n

The open-source RISC-V ecosystem is vital for academic research institutions in Switzerland, according to Benini.\u00a0<\/p>\n

Benini compares it to CERN, where physicists can test their theories using the particle accelerator. \u201cRISC-V plays a similar role as a research infrastructure for computing\u00a0systems.\u00a0It\u2019s\u00a0a very important\u00a0asset that enables research in software and\u00a0specialised\u00a0hardware to reach the outside world in a concrete form,\u201d he said.\u00a0<\/p>\n

Edited by Gabe Bullard\/VdV<\/p>\n

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