{"id":564318,"date":"2026-07-02T01:11:18","date_gmt":"2026-07-02T01:11:18","guid":{"rendered":"https:\/\/www.europesays.com\/ie\/564318\/"},"modified":"2026-07-02T01:11:18","modified_gmt":"2026-07-02T01:11:18","slug":"directly-probing-the-carrier-transfer-length-in-2d-material-transistors","status":"publish","type":"post","link":"https:\/\/www.europesays.com\/ie\/564318\/","title":{"rendered":"Directly probing the carrier transfer length in 2D-material transistors"},"content":{"rendered":"

In response to the increasing needs of artificial intelligence computations and rising requirements in data centres and mobile devices, the necessity to fabricate transistors that are high-density, high-performance and energy-efficient has become increasingly urgent. For decades, the scaling of silicon has adhered to Moore\u2019s law, yet it now approaches a challenging phase as it nears the physical limits of Si. Among the option for post-Si channel materials, two-dimensional (2D) materials emerge as the cornerstone for the continuing scaling of transistors2<\/a>, offering potential advantages in low-power consumption. This miniaturization primarily depends on the scaling of channels and contacts, which involves not only shortening the channel length but also scaling down the size of metal contacts, the crucial gateways for current injection. This presents a marked challenge because shrinking their size can often lead to performance-limiting contact resistance. Substantial efforts have been made in understanding the scaling limitation for ultrathin 2D materials, in particular, on the channel scaling of monolayer (ML) 2D materials for the transistors beyond 1\u2009nm technology node3<\/a>,4<\/a>. However, the equally important metal contact scaling has received very little attention, and it presents a tough challenge, especially for 2D material-based field-effect transistors (FETs), because their current crowding is expected to be prominent at the nanoscale contacts. Numerous research groups have ventured into modifying contact materials or adopting interface engineering techniques to mitigate the high contact resistance issue6<\/a>,7<\/a>,8<\/a>,9<\/a>,10<\/a>,11<\/a>,12<\/a>. However, the task of contact size reduction is still mostly unexplored. One of the inherent challenges lies in the determination of transfer length (LT), which is the effective current injection region between metal contact and 2D material, and it corresponds to the limitation of contact size scaling. A previous study13<\/a> used ab initio simulation to demonstrate that the electron injection from a top metallic contact into underlying 2D material can occur either at the edge or the overlap area of metal\/2D materials interface, depending on the interface properties, implying that the carrier transport strongly relies on contact metals, 2D channel materials and thicknesses, and metal\/2D interface quality. Furthermore, precise and controllable fabrication of sub-20-nm contacts is still very challenging, which makes it more difficult to determine the contact size limit experimentally.<\/p>\n

Early studies have made notable strides in this area. A previous study14<\/a> used an ultrahigh-vacuum metal deposition method to fabricate few-layer MoS2 transistors with an Au contact, estimating a transfer length of around 35\u2009nm. Another study15<\/a> demonstrated that Ni contacts on few-layer MoS2 transistors, fabricated using e-beam lithography, maintained on-state current even with a contact length of 13\u2009nm, suggesting an LT\u2009\u2264\u200913\u2009nm for Ni and few-layer MoS2. MoS2 FETs with Au\/Ni contact lengths varying from 300\u2009nm to 20\u2009nm on ML 2D FETs were fabricated in ref.\u20098<\/a>, indicating a transfer length of approximately 45\u2009nm. Recently, another study16<\/a> has shown that semimetal antimony (Sb) as a contact metal in ML-MoS2 transistors can maintain on-state current even with a 30\u2009nm contact length. Extrapolating through TCAD (technology computer-aided design) model simulation, the study predicted a contact length scaling for Sb-MoS2 at approximately 15\u2009nm. Various reported values of LT estimation for MoS2 are summarized in Extended Data Table 1<\/a>. Despite these advancements, all the transfer length estimation still relies on theoretical simulation or extrapolation of a series of devices with varied metal sizes through theoretical models7<\/a>,17<\/a>,18<\/a>,19<\/a>, where many assumptions are unavoidable to approximate the transfer length. Until now, there is still a lack of direct measurement for the nano-scaled transfer length at the 2D\/metal interfaces in a transistor device, that is urgently needed to understand the scaling constraints for advanced electronics.<\/p>\n

Here, we use cross-sectional scanning tunnelling microscopy and spectroscopy (XSTM\/S), with the ability to probe electronic structures on a sub-nanometre scale while applying an in situ operating voltage between source and drain, to measure the current injection length in metal\u20132D contact. As a semimetal such as bismuth (Bi) or Sb has been demonstrated as almost barrier-free and exhibits extremely low contact resistance on MoS2, with great potential to reach the ultra-scaled contact size6<\/a>,9<\/a>,11<\/a>, Bi-contacted ML-MoS2 is selected in the study to understand the limit of contact scaling. Note that compared with 2D few layers, the ML is considered more suitable for advanced scaling owing to its ultimately thin thickness for desired gate controllability. With this, we have made the direct nanometre-scale experimental measurements of the current injection length of 2D ML transistors. Our findings show a current injection length of approximately 2.0\u20133.0\u2009nm for Bi on ML-MoS2 transistor at room temperature, meeting the metal width requirement in the 1\u2009nm technology node1<\/a> (<18\u2009nm). We anticipate that this proposed metrology will serve as a stepping stone for further experimental endeavours in contact engineering, nanoscale device physics and advanced electronics.<\/p>\n

To validate the good electrical contact between chemical vapour deposition (CVD)-grown MoS2 (see the Methods<\/a> for the growth) and Bi, back-gated MoS2 FETs with varying channel lengths were fabricated, and the transfer length method (TLM) was used for characterizing contact resistance. The optical image and schematic of the measured MoS2 device are shown in Fig. 1a<\/a>. The flowchart of MoS2 device fabrication with SiO2 (100\u2009nm) as the gate dielectric is shown in Extended Data Fig. 1<\/a> and can be referred to in previous publications20<\/a>,21<\/a>. Figure 1b<\/a> shows the output characteristics, source\u2013drain current (IDS) and source\u2013drain voltage (VDS) as a function of gate voltage (VGS) in one of the measured MoS2 FETs, where the measured IDS exhibits a linear dependence on the VSD. The \u03b1 value, derived using the power law IDS\u2009=\u2009VDS\u03b1, is estimated to be approximately 1.00, as shown in Fig. 1b<\/a> (inset), confirming an ohmic-like contact behaviour5<\/a>. Figure 1c<\/a> shows the transfer curves (IDS\u2013VGS) as a function of VDS in the identical device, exhibiting moderate on-current density and standard n-channel conducting behaviour with an on\/off current ratio of larger than 106 at VDS\u2009=\u20091\u2009V and within the VGS range of \u00b140\u2009V, as shown in Fig.\u20091c<\/a> (inset). To estimate the contact resistance (Rc) in our MoS2 FETs, Rc is extracted from the relationship between total resistance (2Rc) and channel lengths at a consistent gate voltage, as shown in Fig. 1d<\/a>. The value of Rc is determined by half of the y-axis intercept resulting from a linear fit to the data points. Consequently, the Rc for a Bi contact to ML-MoS2 is as low as about 70\u2009\u03a9\u2009\u03bcm at a carrier concentration of 6.8\u2009\u00d7\u20091012\u2009cm\u22122. The carrier concentration induced by electrostatic gating is estimated by assuming a simple linear charge dependence on the gate voltage. The corresponding IDS\u2013VDS curves for the determination of contact resistance are provided in Extended Data Fig. 2<\/a>. Figure 1d<\/a> (inset) shows not only the total contact resistance but also transfer length (2LT), determined using the extrapolation method from the TLM. The minimum LT obtained is approximately 9.25\u2009nm. The gate dependence of Rc and LT extracted from the TLM is summarized in Supplementary Table 1<\/a>, which shows that LT increases with increasing gate voltage (that is, higher carrier concentration). The LT values from the TLM will be compared with those derived from the XSTM measurement later.<\/p>\n

Fig. 1: ML-MoS2 FET and its electrical characteristics.<\/b>\"Fig.<\/p>\n

a<\/b>, Optical image (top) and schematic (bottom) of one selected MoS2 device for\u00a0the TLM. b<\/b>, Typical IDS\u2013VDS curves as a function of VGS. The inset is the double-logarithmic IDS\u2212VDS plot, in which the power law of \u03b1 is about 1.00, indicating an ohmic-like behaviour in the Bi-contacted MoS2 FETs. c<\/b>, Typical IDS\u2013VGS curves as a function of VDS. The inset is the logarithmic IDS\u2013VGS plot, in which the on\/off ratio is larger than six orders of magnitude. d<\/b>, Correlation between the measured total resistance and the channel length measured for the TLM devices on SiO2(100\u2009nm)\/Si substrate. The inset shows a contact resistance (Rc) of about 70\u2009\u03a9\u2009\u03bcm and\u00a0the transfer length (LT) by the extrapolation method. Scale bar, 2\u2009\u03bcm (a<\/b>).<\/p>\n

In this work, a Bi-contacted ML-MoS2 transistor with a channel length of 2\u2009\u03bcm is prepared for XSTM measurements. We design a device based on the CVD MoS2 ML contacted with two-terminal Bi source and drain metals, in which the main part of the device fabrication is shown in Fig. 2a<\/a>. To directly probe the length of carrier injection at the contact edge of Bi-contacted MoS2 transistors, we develop device-operating XSTM in this work, in which the ML-MoS2 transistor with Bi contacts is cleaved with mechanical force in an ultrahigh-vacuum chamber (Fig. 2b<\/a>). This methodology avoids environmental contamination and molecular absorption that may affect the characterization of their electronic structures (for details, see Supplementary Note\u00a01<\/a>). Meanwhile, it also provides the ability to directly measure the electronic structure at heterointerfaces. Furthermore, to investigate the carrier transport behaviour under operating conditions, we successively applied the VDS on the cleaved transistor in an ultrahigh-vacuum chamber (Fig. 2c<\/a>) to generate a current from the drain to the source contact, while applying the VG between the source and the gate (Si substrate). For device performance of the transistor for XSTM measurement, refer to Supplementary Note\u00a02<\/a>. We conduct the operando XSTM spectroscopy measurement at the ML-MoS2 at underlying the Bi drain contact and at the channel region to investigate the spatially resolved local electronic structure of MoS2 with and without applying VDS. Figure 2d<\/a> schematically shows the cross-sectional structure of the Bi drain contact with MoS2, in which we define the physical edge of Bi metal towards the channel side as the contact edge (C.E.). Figure 2e,f<\/a> shows the cross-sectional STM topography of the Bi-contacted MoS2 transistor around the C.E. Furthermore, the position of the ML-MoS2 film was delineated using the density-of-states mapping in XSTM spectroscopic measurements (Fig. 2g<\/a>). This identification is also consistent with separate cross-sectional scanning transmission electron microscopy (STEM) and energy-dispersive X-ray spectroscopy measurements (Fig. 2h<\/a>).<\/p>\n

Fig. 2: Schematics and XSTM measurements across the Bi\/MoS2 interface.<\/b>\"Fig.<\/p>\n

a<\/b>, Schematic of the sample structure. b<\/b>, Cross-sectional STM sample cleaved in ultrahigh vacuum. The channel length and the contact length of the sample device are 2\u2009\u00b5m. c<\/b>, XSTM probing on the cross-sectional side of the sample, in which a source\u2013drain bias VDS is applied during the STM measurement, with VS denoting the sample bias for the STM process. d<\/b>, Schematic of the device structure close to the\u00a0Bi drain contact and MoS2. The edge of the\u00a0Bi drain contact is labelled as C.E. (contact edge). e<\/b>, Large-area topography image showing the overall cleaved surface at the C.E. region, from the Bi contact, across the HfO2 dielectric, to the Si substrate. f<\/b>, High-resolution topography image focused on the C.E. region with first derivative computation for each line in the x-axis to extract the contours of\u00a0the Bi contact and MoS2 ML (black lines) at the C.E. region. g<\/b>, High-resolution dI\/dV image with the same Bi contour at the\u00a0C.E. determined in f<\/b>, image acquired at sample bias Vs\u2009=\u2009+2.0\u2009V, current It\u2009=\u2009400\u2009pA and source\u2013drain voltage VDS\u2009=\u20090.0\u2009V. The white and red dashed lines in f<\/b> and g<\/b> represent the position of the\u00a0STS line scans, as detailed in Supplementary Note\u00a03<\/a>. h<\/b>, HR-XTEM image of Bi\/MoS2 interface (top) and the corresponding EDX element mapping (bottom). a.u., arbitrary units. Scale bars, 50\u2009nm (e<\/b>); 5\u2009nm (f<\/b>,g<\/b>); 20\u2009nm (h<\/b>, top and bottom).<\/p>\n

Large-range XSTM scanning was used in the experiment to locate the ML-MoS from the substrate to the top surface of the sample. Once the ML-MoS2 was found, the direction of scanning measurement was switched to investigate along the direction parallel to the MoS2 film until the Bi-MoS2 C.E. was crossed over. For details of locating and identifying the MoS2 layer and C.E., refer to Supplementary Notes\u00a03<\/a> and 4<\/a>. Then, we spatially scan through the MoS2 to the C.E. and the channel after magnifying the scanning region to the MoS2 under the Bi contact metal. Leveraging the inherent high resolution of STM, we can conduct the scanning tunnelling spectroscopy (STS) measurement at a specific distance from Bi to the bottom Si and distinctly identify the STS curves of MoS2 with high spatial resolution (Fig. 3a<\/a>). The STS data for Si show the bandgap measured at approximately 1.1\u2009eV, consistent with existing studies22<\/a>. For MoS2, the observed bandgap was approximately 2.3\u2009eV (ref.\u200923<\/a>). Bi shows a non-zero slope at zero voltage, indicating its metallic properties, whereas the SiO2 between Si and MoS2 shows a wide bandgap character, which is consistent with its dielectric role.<\/p>\n

Fig. 3: Cross-sectional STS measurements and band edge evolution in MoS2 devices with different operating conditions and under different regions.<\/b>\"Fig.<\/p>\n

a<\/b>, The STS evolution from Bi (green) to\u00a0MoS2 (yellow) to SiO2 (brown) with 0.4\u2009nm resolution at VDS\u2009=\u20090.0\u2009V with 0.4\u2009nm resolution. We select the MoS2 curve close to the oxide at each point for further STS analysis. b<\/b>, Comparison of tunnelling spectra for MoS2 under BiDrain at different distances (C.E., A, B to H correspond to 0\u20136.4\u2009nm at a 0.8\u2009nm interval) away from the C.E. with varying VDS (0\u2009V and 0.5\u2009V). The dI\/dV curves are plotted in logarithmic scale. The dotted lines indicate the position of the\u00a0conduction band edge (EC). See Supplementary Notes\u00a09<\/a> and 13<\/a>\u00a0for the counterpart figures to\u00a0a<\/b> and b<\/b> for the device with HfO2 as the dielectric layer. For the definition of the x-axis of STS data, \\(E-{{E}_{\\text{F}}}^{{\\text{MoS}}_{2}}\\), refer to Supplementary Note\u00a014<\/a>. c<\/b>,d<\/b>, Comparison of conduction band edges EC under Bi source (c<\/b>) and drain contacts (d<\/b>) for MoS2 devices with SiO2 as gate dielectric under varying VDS. The zero position of the x-axis corresponds to the C.E. e<\/b>,f<\/b>, Gate-voltage dependence of the conduction band edge EC in\u00a0the Bi\/MoS2\/SiO2 device at fixed VDS\u2009=\u2009\u22120.5\u2009V, measured near the source (e<\/b>)\u00a0and drain contacts\u00a0(f<\/b>). The measurements were performed at three different gate voltages (VG\u2009=\u20090 V,\u00a00.5\u2009V and 2.0\u2009V). For details of uncertainty calculation, refer to Supplementary Note\u00a07<\/a>. a.u., arbitrary units.<\/p>\n

To systematically probe the carrier transport behaviour, we performed operando STS line scans to extract dI\/dV curves of MoS2 from the region under contact to the channel with two different gate dielectrics (20\u2009nm HfO2 and 100\u2009nm SiO2) under varying VG and VDS applied in situ. For performance comparison of devices with HfO2 and SiO2 as dielectric layers, refer to Supplementary Note\u00a05<\/a>. For details of optimizing spatial resolution and sampling strategy for the operando measurement, refer to Supplementary Note\u00a03<\/a>. The device with 100\u2009nm SiO2 enables comprehensive investigation of both VDS and VG while minimizing gate leakage. The measured conduction band (CB) edge energy evolves with the location as shown in Fig. 3b<\/a>. To understand the detailed evolution of band structure, we first focus on analysing the energy-band shifts along the CB edge at the drain area using the device with a 100\u2009nm SiO2 dielectric layer at VG\u2009=\u20090\u2009V. The spatially resolved dI\/dV spectra were collected at 0.8\u2009nm intervals from the C.E. to 6.4\u2009nm into the under-contact region. At VDS\u2009=\u20090\u2009V, the MoS2 CB edge maintains a consistent value of (0.82\u2009\u00b1\u20090.02)\u2009eV across all positions, as indicated by the yellow dotted line in Fig. 3b<\/a>. On applying VDS\u2009=\u20090.5\u2009V, we observe systematic shifts in all spectral curves, prompting a detailed analysis of the CB edge positions under different bias conditions, as presented in Fig. 3c,d<\/a>. Note that the CB edge is extracted with the assumption that a linear region is observed on either side of the onset in the STS curve, as detailed in previous publications24<\/a> and Supplementary Note\u00a06<\/a>. The error bars of CB values and difference are calculated by including the uncertainties from each CB measurement and using error propagation25<\/a> to ensure a proper representation of the combined uncertainty (for details, see Supplementary Note\u00a07<\/a>). The position-dependent CB edge values measured on devices with both dielectric configurations reveal several key features. For the SiO2-based device, at VDS\u2009=\u20090\u2009V, the CB maintains a uniform energy level throughout the measured region. On applying VDS\u2009=\u2009\u22120.5\u2009V, we observe that the CB edge of MoS2 exhibits a position-dependent shift under the drain contact. This shift extends into the channel region, where the CB edge difference between two measured points (about 3\u2009nm from the drain and about 3\u2009nm from the source) is (0.45\u2009\u00b1\u20090.11)\u2009eV, primarily reflecting the channel voltage drop, given that contact resistance accounts for less than 1% of the total resistance (Fig. 1<\/a>).<\/p>\n

Meanwhile, there are two points worth noting: (1) On applying VDS\u2009=\u2009\u22120.5\u2009V, the MoS2 CB edge are saturated and stabilized at a distance of 6\u2009nm or more from the C.E. point as denoted by the universal energy shift \\(\\Delta {E}^{{\\text{V}}_{\\text{DS}}}\\) in Fig. 3d<\/a>. (2) The CB edge near the C.E. point (that is, 0\u20136\u2009nm) exhibits an additional shift \u2206Eedge, as shown in Fig. 3c,d<\/a>, resulting in a more pronounced total energy shift \u2206EC. It is well acknowledged that the voltage drop across a device should be correlated to the resistance between two ends26<\/a>. However, this large shift \u2206Eedge cannot be explained by the voltage drop because the contact resistance (Rc) is only 70\u2009\u03a9, constituting less than 1% of the total resistance.<\/p>\n

When measuring n-type semiconductors such as MoS2 with STM, we focus on the CB rather than the valence band (VB) because the tip-sample system can be approximated to a metal-oxide semiconductor (MOS) structure. The measured CB edge position is influenced by two key factors. First, applying a positive bias to the sample leads to carrier depletion and a larger band bending at the surface, requiring a higher tunnelling bias to reach the CB onset. Conversely, when a negative bias is applied, carrier accumulation at the surface enhances the electric field screening, reducing the band bending27<\/a>. This difference in band bending causes the measured CB edge to deviate more from the actual value compared with the VB edge. Second, the onset of the tunnelling current (the measured band edge position) varies significantly depending on the local carrier concentration28<\/a>,29<\/a>. Simulations of this so-called tip-induced band bending (TIBB) effect in Extended Data Fig. 3b<\/a> indicate that changes in carrier concentration have a more pronounced effect on the CB than on the VB. In regions with fewer carriers, a higher voltage must be applied to detect efficient tunnelling current because of lower electric field screening efficiency. However, as the carrier concentration increases, the effect of TIBB weakens, resulting in measured CB and VB edge positions being closer to the real energy-band structure. For details of the band bending and band alignment evolution, refer to Supplementary Note\u00a08<\/a>.<\/p>\n

Therefore, the observation of \u2206Eedge is proposed to be attributed to the increase in carrier concentration at the C.E. edge because of the injection of carriers from the contact, causing the energy shift of the CB edge at the C.E. point from the weakening of the TIBB effect. This attribution is further strengthened by systematically ruling out alternative causes, such as defects, dopants or instrumental artefacts, as detailed in Supplementary Note\u00a09<\/a>. Notably, in the source region (Fig. 3c<\/a>), the additional voltage drop \u2206Eedge is noted at the points less than 6\u2009nm from the source C.E. on applying an external voltage (VDS\u2009=\u2009\u22120.5\u2009V), whereas regions beyond 6\u2009nm exhibit a consistent value, closely matching the CB value of MoS2 at VDS\u2009=\u20090\u2009V. This consistency is attributed to the source serving as the ground for VDS, where no additional voltage drop is expected. To confirm the reproducibility of our measurement model, we also conducted the STS measurement under different VDS, as shown in Fig. 3c,d<\/a>, and all of them show similar band bending behaviour at the C.E. To further understand the gate-voltage influence on carrier injection characteristics, we conducted measurements with fixed VDS\u2009=\u2009\u22120.5\u2009V while varying VG using the SiO2 device, as shown in Fig. 3e,f<\/a>. These measurements show that both source and drain regions exhibit systematic changes in band bending magnitude and spatial extent with increasing gate voltage, which is consistent with our TLM measurement and previous literature7<\/a>,30<\/a>. For details of VG value selection for in situ XSTM measurement, refer to Supplementary Notes\u00a010<\/a>\u201312<\/a>.<\/p>\n

Following the definition of transfer length in TLM model31<\/a> as described by the length for which the voltage drops to 1\/e in exponential decay functions fitting, we quantitatively analysed the fitting curve of the CB points and the corresponding transfer length (LT) in various operating conditions in Fig. 3c\u2013f<\/a> and presented in Fig. 4a,b<\/a>. Figure 4a<\/a> shows the exponential fitting line of MoS2 under drain and source contact regions after applying VDS while VG\u2009=\u20090\u2009V. With the exponential decay fitting and defining 1\/e as transfer length, it is appropriate to define the measured 2.0\u2009nm as the transfer length for the SiO2 device when VDS\u2009=\u2009\u22120.5\u2009V, and extend to 2.9\u2009nm when VG\u2009=\u20092\u2009V is applied.<\/p>\n

Fig. 4: Transfer length analysis through band edge fitting and comparison across different operating conditions.<\/b>\"Fig.<\/p>\n

a<\/b>, Exponential decay fitting of the additional band edge shift (\u2206Eedge) near the C.E. for Bi\/MoS2\/SiO2 devices under different VDS conditions. The carrier concentration scale corresponds to the TIBB simulation results in Extended Data Fig. 3<\/a>. The intrinsic carrier concentration n0 for MoS2\/SiO2 is 1011\u2009cm\u22122. b<\/b>, Exponential decay fitting of the additional band edge shift (\u2206Eedge) near the C.E. for the Bi\/MoS2\/SiO2 device under different VG conditions. Gate-voltage dependence of band edge decay profiles in Bi\/MoS2\/SiO2 device at fixed VDS\u2009=\u2009\u22120.5\u2009V shows a systematic increase in transfer length (LT) with increasing VG. The inset shows the definition of transfer length as the 1\/e decay distance. For details of the\u00a0fitting, refer to Supplementary Note\u00a016<\/a>. c<\/b>, Schematic of MoS2 band alignment and current injection path near the\u00a0C.E. under bias operation. The blue curve is the band alignment considering the potential drop of the\u00a0TLM model. \\({\\Delta E}^{{V}_{{\\rm{D}}{\\rm{S}}}}\\) is the energy difference between the\u00a0source and drain due to the applied source\u2013drain voltage VDS. The black dashed line is the quasi-Fermi level of MoS2. LT denotes the transfer length, which is measurable at the\u00a0sub-nanometre scale in XSTM measurements. d<\/b>, Comparison of the\u00a0transfer length between MoS2 and different metal contacts obtained through various methods. Direct, direct measurement from this work; Scaling, contact length scaling experiments; TLM, transfer length method extraction; Sim., theoretical simulations. The dashed lines indicate IRDS requirements for 1\u2009nm and 3\u2009nm technology nodes.<\/p>\n

Next, we need to know how much of the change in carrier concentration causes the band shift at the C.E. Depending on the onset of the CB with different positions, we performed simulations based on the TIBB model32<\/a> (Extended Data Fig. 3<\/a>) to extract how the carrier concentration changes with different distances from the C.E. points. For MoS2 with lower carrier concentration, the onset of tunnelling current is higher because of the significant TIBB effect. By contrast, MoS2 with higher carrier concentration has the measured position of the CB edge closer to the real value because of the weakening of the TIBB effect and the significant screening effect (Extended Data Fig. 3b<\/a>). The change of the STS curves due to the change of carrier concentration is also shown in Extended Data Fig. 3c<\/a>. Thus, the apparent additional shift of the CB edge, \u2206Eedge, causing the CB edge to be closer to the Fermi level of the MoS2 at the grounded source (\\({{E}_{\\text{F}}}^{{\\text{MoS}}_{2}}\\)), is due to carrier injection at the C.E. Note that, the CB of MoS2 in the channel, after applying an external voltage, is elevated above the linear interpolation between the CB of source and drain C.E.s, which is due to the difference of TIBB effect on MoS2 in the channel and under Bi contact, as shown in Extended Data Fig. 4<\/a>. This difference (\u03941\u2009\u2260\u2009\u03942) originates primarily from the altered electronic properties of MoS2 underneath the Bi contact, such as electron affinity, work function and local dielectric environment33<\/a>,34<\/a>,35<\/a>, which collectively influence the local carrier distribution and thus the magnitude of band bending.<\/p>\n

Furthermore, by comparing the \u2206EC values in the simulation results with our experimental results, we can infer that the carrier injecting through the MoS2 at the C.E. is about two orders of magnitude higher than that of the MoS2\u2009>\u20092\u2009nm from the C.E. at VDS\u2009=\u2009\u22120.5\u2009V as shown in Fig. 4a<\/a>. The exponential decay fitting for the CB under contact in Fig. 3f<\/a> is shown in Fig. 4b<\/a>. We found that the transfer length is longer when gate bias increasing, which might be due to the current crowding effect that the longer distance is needed for more carrier to pass through. It is consistent with the results shown in Fig. 4a<\/a> that the transfer length36<\/a>,37<\/a> would be longer when increasing the VDS, which drives more carrier from drain to source. The schematic band diagram of MoS2 device under operating is shown in Fig. 4c<\/a>. This band diagram shows the intrinsic band alignment considering the potential drop of TLM model in VDS applying situation and the transfer length (LT) indicated in the figure is measurable at sub-nanometre scale in XSTM measurements. The observed exponential decay of the CB edge shift directly correlates with the spatial distribution of injected carriers, providing unprecedented insight into the carrier injection process at the metal\u20132D semiconductor interface. It is to be noted that the carrier transfer length in our XSTM measurement (2.0\u20132.9\u2009nm) is lower than the previous result of MoS2 FET with Bi contact in Fig. 1d<\/a>, which is 9.25\u2009nm, determined based on TLM model without using 1\/e decay function at room temperature.<\/p>\n

The application of TLM to estimate LT, assuming Rsh\u2009=\u2009Rsk (where Rsh is the channel sheet resistance and Rsk is the sheet resistance under metal), could lead to differences if the metal contact alters the conductivity of the underlying channel material (MoS2 in this case). In our experimental results, LT is 9.25\u2009nm, Rc is 70\u2009\u03a9\u2009\u03bcm and channel resistance RT is 66.8\u2009k\u03a9\u2009\u03bcm at a channel length of 0.8\u2009\u03bcm. Using these values in the conventional TLM equations, Rsh is calculated as 81.6\u2009k\u03a9. However, in real situations Rsk shows a significant deviation from Rsh owing to contact doping (details in Supplementary Note\u00a019<\/a>), fabrication-induced damage and metal-induced gap states (MIGS)17<\/a>,18<\/a>. By inserting the measured transfer length of 2.0\u2009nm into the modified TLM equation17<\/a>, Rsk is determined to be 380\u2009k\u03a9, which is much larger than the original Rsh (81.6\u2009k\u03a9). According to a modified TLM model for 2D devices17<\/a>, when Rsk\/Rsh\u2009<\u20091, the estimated transfer length exceeds that determined by conventional TLM, suggesting that if the contact metal enhances the conductivity of the underlying 2D material, the actual transfer length could be longer than that estimated using conventional TLM (Rsk\u2009=\u2009Rsh). This analysis highlights the importance and necessity of direct measurements in response to the trend of shrinking dimensions of forward-looking semiconductor devices.<\/p>\n

To further confirm the validity of the methodology, we also investigated the transfer length of a Bi-contacted MoS2 device with HfO2 as dielectric, as shown in Extended Data Fig. 5<\/a> and a p-type WSe2 device with Pd\/Sb alloy contacts (6\u2009nm of Sb followed by 20\u2009nm of Pd) using XSTM. As the p-type contact resistance is still yet to be improved, spatially resolved the STS measurements were taken at a larger interval (40\u2009nm). Analogous to n-type contact, the p-C.E. (Extended Data Fig. 6a<\/a>) showed a significant VB shift towards the Fermi level on applying VDS (Extended Data Fig. 6b,c<\/a>). This observation is consistent with TIBB model simulations (Extended Data Fig. 6d,e<\/a>), which show that the EVB of WSe2 is closer to the Fermi level when the carrier concentration is increased, whereas the EC remains relatively unchanged. In p-type semiconductors such as WSe2, the focus is on the VB rather than the CB because of the effects of TIBB. The difference between the measured and actual values of the VB is larger than that of the CB, and this difference is reduced by changes in carrier concentration. Consequently, the VB shift is more sensitive to variations in carrier concentration compared with the CB, making it a more suitable parameter for analysis in p-type semiconductors. The transfer length of WSe2 with Pd\/Sb alloy contacts was determined as approximately 211\u2009nm (Extended Data Fig. 6c<\/a>).<\/p>\n

In conclusion, we use operando cross-sectional STM\/STS to directly probe the carrier transfer length at metal\/2D semiconductor interfaces with sub-nanometre spatial resolution. Figure 4d<\/a> compiles our measured LT on MoS2 and those estimated based on direct contact scaling, simulation or TLM extraction. Our measurements show an ultrashort transfer length of about 2\u20133\u2009nm for optimized Bi-MoS2 contacts, satisfying the projected contact scaling requirements for the 1\u2009nm technology node1<\/a>. These results provide direct experimental evidence that contact scaling in 2D transistors can extend well into the deep nanoscale regime, consistent with recent industry projections5<\/a>. However, p-type contact is yet to be largely improved17<\/a>,38<\/a>,39<\/a> (Extended Data Table 2<\/a>).<\/p>\n

Beyond 2D systems, we further validate the generality of our methodology through additional operando cross-sectional STM measurements on silicon-on-insulator (SOI) devices (Supplementary Note\u00a020<\/a>). In these conventional semiconductor structures, we successfully extract a transfer length of about 55\u2009nm, in good agreement with values estimated using TLM. This consistency confirms that the proposed technique is not limited to 2D materials but is broadly applicable to established semiconductor platforms. Taken together, these results establish operando XSTM as a universal metrology for directly resolving carrier injection physics across a wide range of device architectures, spanning 2D materials, heterostructures and Si technologies. This ability provides an experimental foundation for understanding contact scaling limits and will play an important part in guiding the design of future ultra-scaled electronic devices.<\/p>\n","protected":false},"excerpt":{"rendered":"In response to the increasing needs of artificial intelligence computations and rising requirements in data centres and mobile…\n","protected":false},"author":2,"featured_media":564319,"comment_status":"","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"footnotes":"","_share_on_mastodon":"0"},"categories":[77],"tags":[18,17340,1099,19,17,1100,28287,133],"class_list":["post-564318","post","type-post","status-publish","format-standard","has-post-thumbnail","category-science","tag-eire","tag-electronic-devices","tag-humanities-and-social-sciences","tag-ie","tag-ireland","tag-multidisciplinary","tag-scanning-probe-microscopy","tag-science"],"share_on_mastodon":{"url":"https:\/\/pubeurope.com\/@ie\/116847725069422538","error":""},"_links":{"self":[{"href":"https:\/\/www.europesays.com\/ie\/wp-json\/wp\/v2\/posts\/564318","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.europesays.com\/ie\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.europesays.com\/ie\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.europesays.com\/ie\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/www.europesays.com\/ie\/wp-json\/wp\/v2\/comments?post=564318"}],"version-history":[{"count":0,"href":"https:\/\/www.europesays.com\/ie\/wp-json\/wp\/v2\/posts\/564318\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.europesays.com\/ie\/wp-json\/wp\/v2\/media\/564319"}],"wp:attachment":[{"href":"https:\/\/www.europesays.com\/ie\/wp-json\/wp\/v2\/media?parent=564318"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.europesays.com\/ie\/wp-json\/wp\/v2\/categories?post=564318"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.europesays.com\/ie\/wp-json\/wp\/v2\/tags?post=564318"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}