Samsung Electronics (005930.KS) is developing an 8-layer stacked seventh-generation high-bandwidth memory chip, HBM4E, for Nvidia (NVDA), targeting transfer speeds of up to 18Gbps—approximately 20% higher than Samsung’s current samples. The development is seen as a pivotal step in Nvidia’s push for its custom memory platform, NVHBM, and is poised to reshape the competitive landscape of the high-end AI memory market.
Nvidia has asked Samsung to adjust the HBM4E stack count from the originally planned 12 and 16 layers down to an 8-layer architecture. Market sources indicate the change reflects a broader shift in AI chip design away from pure capacity expansion toward a holistic balance among bandwidth, power consumption, thermal dissipation, and packaging yield. An 8-layer design reduces package height and thermal challenges while maintaining the data throughput required by AI accelerators through higher per-pin transfer speeds.
Nvidia has set a speed specification of 17 to 18Gbps for the product, representing roughly a 20% improvement over Samsung’s initial HBM4E samples at 14.4Gbps. Industry sources note that Samsung has already demonstrated the highest speed levels in the industry during HBM4 validation, and if the 8-layer product meets Nvidia’s requirements, Samsung would secure a favorable position in the speed race.
NVHBM is a technology platform Nvidia recently unveiled. Its core concept involves relocating the memory controller originally housed on the GPU to the base die at the bottom of the HBM stack, thereby enhancing the overall performance of both the HBM and the GPU simultaneously. Nvidia has stated that the memory controllers used in future base dies will conform to the specifications of its own next-generation memory controller, signaling that Nvidia is actively moving into a domain previously dominated by memory manufacturers.
The NVHBM is expected to be deployed in Nvidia’s next-generation AI GPU platform, Rubin Ultra, which is scheduled for launch next year. The platform will dramatically expand GPU-to-GPU interconnect counts from the current maximum of 72 links to 576 links, significantly raising the bar for memory bandwidth and interconnect efficiency.
In the custom HBM market, Samsung is considered to hold a unique integration advantage. NVHBM requires both DRAM manufacturing capability and the ability to design and produce logic-based base dies—and Samsung is the only one of the three major memory makers capable of delivering a complete, vertically integrated solution. Samsung’s System LSI division has accumulated extensive logic chip design experience and has already incorporated its 4-nanometer advanced process into HBM4 base die production, giving it a performance lead over competitors.
For Samsung, the base die represents not just a demonstration of design capability but also a lever for foundry capacity utilization. The higher Samsung’s HBM shipment volume, the better the utilization rate of its advanced-process foundry lines—creating a dual benefit across its memory and foundry businesses.
SK Hynix (000660.KS) is pursuing a different strategy. Beginning with the HBM4E generation, the company plans to outsource base die production to TSMC’s advanced process nodes, and is therefore aggressively expanding its own logic chip design capabilities. Market sources indicate SK Hynix has undertaken large-scale recruitment of engineers from Samsung’s System LSI division this year to strengthen its in-house base die design capabilities, seeking a competitive edge through design differentiation given its inability to manufacture logic chips in-house.
Industry observers note that Nvidia’s collaboration with Amazon Web Services (AWS) could further accelerate the development of standardized base dies, reducing reliance on the three major memory makers—Samsung, SK Hynix, and Micron. If standardization gains traction, memory manufacturers’ dominance in base die design could face a redistribution of control, and the power dynamic between Nvidia and memory suppliers will become a key storyline in the high-end AI memory market over the coming years.
Samsung’s 8-layer HBM4E remains in the development and validation phase. The 17 to 18Gbps speed requirement is notably higher than current sample levels, and mass-production yield, power management, and customer validation progress will be the critical variables determining whether the product translates into actual orders. If Samsung successfully breaks into the NVHBM supply chain, it would help narrow the gap with SK Hynix in the high-end HBM market and reshape the competitive dynamics of the AI memory industry.