Samsung Electro-Mechanics' silicon capacitor product. It features nanometer-scale dimensions and is embedded within the substrate. Samsung Electro-Mechanics - Seoul Economic Daily Finance News from South KoreaSamsung Electro-Mechanics’ silicon capacitor product. It features nanometer-scale dimensions and is embedded within the substrate. Samsung Electro-Mechanics

As lower power consumption and reduced latency emerge as core challenges for artificial intelligence (AI) chips, Samsung Electro-Mechanics (009150.KS) is pursuing global big tech customers with a turnkey solution that bundles semiconductor substrates and capacitors (passive components) into a single package. The “silicon cap,” miniaturized using semiconductor processes, has also emerged as a core component for next-generation AI chip packaging, establishing itself as a new growth axis. As a result, analysts say Samsung Electro-Mechanics has successfully transformed itself into an “AI total solution” company, holding an exclusive position that allows it to simultaneously produce essential components for AI chip packaging.

According to industry sources Tuesday, Samsung Electro-Mechanics has recently been ramping up a “bundling” strategy that combines multilayer ceramic capacitors (MLCC) and silicon capacitors (Si-Cap) with flip-chip ball grid arrays (FC-BGA) for global big tech firms.

“When selling to global big tech customers, the package solution division and the staff in charge of MLCC and Si-Cap participate as one team,” a company official said. “This is to support technical discussions so that customers can choose the appropriate solution between MLCC and Si-Cap at the AI chip design stage.”

When designing AI chips, big tech firms configure packaging by choosing either an “FC-BGA and MLCC” or “FC-BGA and Si-Cap” combination according to their requirements. For areas requiring high voltage and large capacity, MLCC, the existing flagship component, is placed on top of the substrate. But when space constraints are significant and ultra-high-speed computing is required, ultra-thin Si-Caps measuring tens of nanometers (nm, one billionth of a meter) are embedded inside the substrate.

This “triangular formation” bundling sales approach has already led to trillion-won orders. Last month, the company signed a Si-Cap supply contract worth 1.557 trillion won with one of the global big tech firms. The contract runs for two years starting in January next year. Behind such long-term agreements (LTA) lies a supply chain that is limited relative to demand. Currently, only three companies can supply Si-Cap: Samsung Electro-Mechanics, TSMC, and Murata. As a result, the industry expects discussions over additional orders to gain momentum in the second half of this year.

“As the variety and production volume of application-specific AI semiconductors (ASIC) increase, big tech’s moves to secure Si-Cap in advance are growing,” an industry source said. “There is a high possibility of continuous new orders over the next 3 to 6 months.” The source added, “AI FC-BGA capacity has also mostly been sold out, including next year’s volume,” and “Samsung Electro-Mechanics, which holds both pillars of AI packaging, has ridden onto an unprecedented super cycle.”

The prevailing forecast is that this boom for Samsung Electro-Mechanics will not be short-lived but will continue for more than five years. According to market research firms, the global Si-Cap market is expected to grow at an annual average rate of 18% through 2031.

In particular, the adoption of the vertical power delivery (VPD) architecture, a next-generation AI chip packaging technology, is seen as a key driver for Si-Cap. VPD supplies power vertically from the bottom of the substrate to the chip and is regarded as a next-generation packaging technology that can reduce parasitic inductance (ESL), which degrades AI chip performance. Since Si-Cap is a core component mounted in large quantities on the back of the substrate in the VPD structure, analysts say the spread of VPD will be directly linked to expanding Si-Cap demand.

Meanwhile, Samsung Electro-Mechanics is said to be actively using not only Samsung Foundry but also overseas foundry fabs in Taiwan and elsewhere to produce Si-Cap. Si-Cap is manufactured using mature 10- to 100-nanometer processes, which offers the advantage of more flexibility in securing production bases compared to advanced 2- to 3-nanometer processes. The industry expects Samsung Electro-Mechanics to further solidify its leadership in the Si-Cap market by enhancing delivery competitiveness through foundry supply chain diversification.

Samsung Electro-Mechanics' silicon capacitor prototype. Fine terminals and a porous layer are formed on the surface. Samsung Electro-Mechanics - Seoul Economic Daily Finance News from South KoreaSamsung Electro-Mechanics’ silicon capacitor prototype. Fine terminals and a porous layer are formed on the surface. Samsung Electro-Mechanics