SK Hynix is extending its memory technology battlefront from server-side High Bandwidth Memory (HBM) to end-point devices, officially launching the development of next-generation memory for On-Device AI. The company recently posted job openings for the first time through its North American subsidiary in San Jose, California, seeking “3D Stacked DRAM-on-Logic” design engineers. The listing explicitly states the role involves joint design with specific U.S. clients, a move the industry views as a significant signal that the technology is moving toward commercialization.<\/p>\n
According to SK Hynix’s job posting, the talent sought must “collaborate closely with U.S. clients, lead the joint design of 3D stacked DRAM logic chips, and provide chip design solutions that meet technical requirements and market changes.” This marks not only the first time SK Hynix has recruited specialized talent for this specific technology domain but also directly reveals that it has established deep cooperative relationships with specific U.S.-based clients.<\/p>\n
Market sources indicate that the core target market for 3D stacked DRAM encompasses high-value-added sectors such as smartphone application processors (APs), with potential clients pointing to top chip design giants like Apple and Qualcomm. This means that after solidifying its leadership in the HBM sector, SK Hynix is significantly tilting resources toward the on-device AI memory track, aiming to seize the initiative before the competitive landscape takes shape.<\/p>\n
Breaking Through Traditional Packaging Bottlenecks: From PoP to Vertical Stacking<\/p>\n
3D Stacked DRAM-on-Logic is an advanced packaging technology that vertically stacks DRAM memory on top of system semiconductors (logic chips). Compared to the traditional PoP (Package-on-Package) structure widely used in mobile devices today, this technology can dramatically shorten the interconnection distance between chips and achieve more data transmission channels (I\/O) within the same footprint.<\/p>\n
SK Hynix pointed out that on-device AI has extremely stringent simultaneous requirements for high memory bandwidth and low power consumption, and traditional PoP structures have shown clear bottlenecks in achieving this performance. Since PoP stacks two independently packaged chips on top of each other, the longer interconnection distance limits data transmission speed and power efficiency. 3D Stacked DRAM-on-Logic is designed precisely to break through this physical limitation, effectively reducing data transmission latency while improving power efficiency and space utilization.<\/p>\n
The most closely watched application scenario is currently mobile application processors. These chips handle the core computing functions of smartphones, and as generative AI is gradually integrated into endpoint devices, the demand for advanced packaging processes is most urgent.<\/p>\n
SK Hynix’s Chief Development Officer (CDO), President Ahn Hyun, stated clearly at the “TSMC Technology Symposium 2026” this past April: “The convergence of memory and logic technology is the technical breakthrough needed to overcome existing architectural limitations and maximize AI performance.” He had already incorporated 3D Stacked DRAM-on-Logic into the company’s solution roadmap for diverse client workloads, listing it alongside Custom HBM and High-Bandwidth Flash (HBF) as one of three strategic development directions.<\/p>\n
A Full-Scale AI Memory Layout<\/p>\n
SK Hynix is currently in a period of intensive investment, advancing multiple technology lines simultaneously. In addition to the newly launched 3D stacked DRAM talent recruitment, market sources indicate that its “Y1” factory in Yongin began equipment procurement in July; the NAND Flash production line at its Cheongju plant is also planned for a massive expansion with an investment of approximately \u20a9100 trillion (approximately $68.3 billion). On its core HBM product line, industry insiders reveal that samples of the next-generation HBM4E 12-layer product have already been shipped to major clients, further consolidating its leadership position in the AI server memory market.<\/p>\n
This layout for 3D stacked DRAM not only enriches SK Hynix’s product matrix for the AI era but also demonstrates that its strategy is shifting from being a pure memory supplier to a technology partner that co-defines next-generation computing architectures with its clients.<\/p>\n
Competitor Dynamics<\/p>\n
In the race to develop next-generation 3D DRAM, Samsung Electronics is also not standing idle. Related reports indicate that Samsung recently co-authored a joint paper on a monolithic 3D DRAM architecture with the Belgian research center imec, KU Leuven, and major semiconductor equipment manufacturer Lam Research. This technology utilizes an oxide semiconductor channel, but the research is currently still in the simulation stage, with no specific commercialization plans disclosed.<\/p>\n
In contrast, SK Hynix’s direct move toward joint design for specific clients signals that its practical deployment in on-device AI memory is a step ahead of its competitors. The industry widely believes that 3D stacked DRAM will be a key semiconductor for edge AI devices in the era of physical AI, making the strategic value of being a first mover exceptionally significant.<\/p>\n","protected":false},"excerpt":{"rendered":"SK Hynix is extending its memory technology battlefront from server-side High Bandwidth Memory (HBM) to end-point devices, officially…\n","protected":false},"author":2,"featured_media":97585,"comment_status":"","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[23],"tags":[50608,3628,699,6368,6530,50609,23122,276,241,240,275,3246],"class_list":["post-97584","post","type-post","status-publish","format-standard","has-post-thumbnail","category-sk","tag-3d-stacked-dram","tag-apple","tag-hbm","tag-hbm4e","tag-on-device-ai","tag-pop-packaging","tag-qualcomm","tag-samsung-electronics","tag-sk","tag-sk-group","tag-sk-hynix","tag-tsmc"],"_links":{"self":[{"href":"https:\/\/www.europesays.com\/korea\/wp-json\/wp\/v2\/posts\/97584","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.europesays.com\/korea\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.europesays.com\/korea\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.europesays.com\/korea\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/www.europesays.com\/korea\/wp-json\/wp\/v2\/comments?post=97584"}],"version-history":[{"count":0,"href":"https:\/\/www.europesays.com\/korea\/wp-json\/wp\/v2\/posts\/97584\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.europesays.com\/korea\/wp-json\/wp\/v2\/media\/97585"}],"wp:attachment":[{"href":"https:\/\/www.europesays.com\/korea\/wp-json\/wp\/v2\/media?parent=97584"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.europesays.com\/korea\/wp-json\/wp\/v2\/categories?post=97584"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.europesays.com\/korea\/wp-json\/wp\/v2\/tags?post=97584"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}