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At its Technology Days event in Santa Clara, California, last week, NXP Semiconductors introduced a new family of MCUs designed to transform previously invisible endpoints in a factory automation or edge IoT setting into IP-based nodes from which data can usefully contribute to operational intelligence and automation.

Its new MCX A5 family of MCUs are said to simplify secure connectivity for industrial and IoT edge applications, delivering what the company claims is the industry’s first implementation of topology discovery enabled on a wired MCU with 10BASE-T1S Ethernet digital PHY, secured by post-quantum cryptography (PQC).

The topology discovery, in our view, is significant here. Where in the past multiple endpoints were added on a multi-drop industrial network without having IP-node mapping, this feature can make all those nodes visible. Speaking at the event, NXP’s senior director for secure connected edge products, Justin Mortimer, said, “The MCX A5 makes IP networking practical right down to sensors, actuators, small HMIs and motor controllers, while preserving the installation simplicity of fieldbus.”

Justin Mortimer of NXP Semiconductors explains the significance of the company’s new microcontrollers to Nitin Dahad of EE Times in this video interview.

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The company’s official announcement stated that integrated 10BASE-T1S Ethernet enables manufacturers to extend IP-based connectivity deeper into industrial systems, connecting more sensors, actuators, and controllers, all while reducing system cost and complexity. Topology discovery automatically identifies and maps connected devices, improving network visibility and simplifying deployment. This, NXP said, enables the MCX A5 family to turn more devices into accessible sources of real-time data for analytics, automation, and other industrial edge AI applications.

“What we do with MCX A5 is we’re bringing 10BASE-T1S Ethernet all the way to the endpoint, and the key is that you can see all the nodes on the network,” Mortimer said.

Explaining further, he said, “Today, when you have a field bus like RS 485, for example, it kind of becomes a little bit gray: you have a controller or a PLC, and then you have all these nodes strung out on a multi-drop bus. But you don’t have an Ethernet IP address at all those endpoints, and you don’t necessarily get the same level of visibility to the whole network. With the MCX A5, we have the ability to automatically discover and map industrial networks with the new technology where you can do topology discovery in the microcontroller.”

Diagram comparing manual network mapping with unverified question-mark nodes to automated network discovery powered by the NXP MCX A5 microcontroller.According to NXP’s Mortimer, the new MCX A5 microcontroller can automatically discover and map industrial network topology on-chip.(Source: NXP Semiconductors)

For operators and maintenance teams, this means that a network that was previously opaque suddenly becomes visualizable: an HMI can display the entire bus layout and highlight specific devices.

Mortimer added that the new microcontroller family is the missing piece that brings IP networking and strong security all the way down to the smallest industrial end nodes. That visibility pays off when, for example, you are swapping a single sensor or actuator on a brownfield bus without touching the rest; or diagnosing faults such as pinched cables or unreliable nodes; and incrementally upgrading from legacy fieldbus to an IP‑based network over time.

He also stressed that topology discovery isn’t meant to run continuously, it’s a configuration, diagnostics, and maintenance tool, not a constant background process.

Maintaining device security across the entire lifecycle

It’s obvious that once you start giving IP addresses to more nodes on a multi‑drop cable, then each of those nodes also add to the network’s potential attack surface. Hence the new MCX A5 family not only includes PSA Certified Level 3 security, but they also have support for PQC, including a PQC-based hardware root of trust including secure boot, secure firmware updates, secure attestation, and secure debug authentication. Selected devices also support the Rust programming language, enabling developers to adopt modern, memory-safe software development practices. 

Mortimer repeatedly framed security as being at the core of the design, and not an afterthought. “It’s not just because that’s what’s needed today, but it’s about what’s going to protect us going into the future for the next 10–20 years,” he said.

For OEMs, this matters because industrial nodes often must stay in the field well beyond a decade, and regulations like the CRA (Cyber Resilience Act) are beginning to require long‑term updatability and security maintenance.

When paired with NXP’s TJF1410 10BASE-T1S physical medium dependent (PMD) transceiver, the MCX A5 family provides a complete single pair Ethernet (SPE) solution for industrial and building automation applications, with the TJF1410 acting as the analog front-end to the MCX A5’s integrated digital PHY. The TJF1410 is optimized for IEEE 802.3cg-compliant 10BASE-T1S networks and complements the MCX A5’s integrated digital PHY, which NXP said simplifies the system design and reduces the bill-of-material costs for industrial automation, building automation, energy infrastructure, and other distributed edge applications.

Driving real-world adoption in industrial and commercial spaces

While MCX A5 is a general‑purpose industrial MCU family, Mortimer highlighted several early focus areas. These include logistics and warehousing, building automation, and robotics and physical AI.

For example, he said one of its logistics partners regularly expands its warehouse conveyors and sorting systems in stages. As each new conveyor segment is added, with the new MCU and 10BASE-T1S, that partner can add IP‑based nodes along each conveyor section, and conduct incremental expansion and replacement without having to re‑wire the entire system.

Building automationis a particularly strong early adopter vertical, according to Mortimer. Many existing systems still use RS‑485 fieldbuses for HVAC dampers, sensors, actuators, and small HMIs. The topology discovery capability in the new MCUs offers a drop‑in wiring model (single pair, multi‑drop) that installers understand, and a path to IP‑addressable endpoints without moving to bulky 10/100 Ethernet hardware.

Mortimer said the company is actively sampling and in design discussions with large OEMs and smaller subsystem vendors in this segment.

Robotics and physical AI

The robotics and physical AI themes were a larger part of the discussions at NXP Tech Days last week, in which the speakers extended the story that NXP’s CEO, Rafael Sotomayor, talked at Computex in Taiwan earlier this year, about deploying “right-sized intelligence” for scalable physical AI.

In this video conversation, Saloni Gankar, principal analyst for industrial semiconductors at analyst firm Omdia, offers her perspectives on some of the key discussions and announcement at NXP Tech Days, and discusses broader trends in the industrial and physical AI market for semiconductors.

An integral part of those systems are the distributed microcontrollers controlling everything like the motors, joints, grippers, and tactile sensors. While currently those MCUs are often connected by short‑reach buses that don’t offer good global visibility, Mortimer said its new microcontroller can become a standard building block for those distributed controllers, in that each limb or section of a robot—arms, hands, fingers—can be wired with 10Base‑T1S single‑pair Ethernet. As a result, every actuator and sensor node would gain an IP address and secure identity. This way, the top‑level AI controller can see and manage the entire topology, rather than treating downstream MCUs as opaque islands.

He indicated that at least one robotics customer is already actively designing with related technology and looking seriously at 10BASE‑T1S for end‑node connectivity.

The MCX A5 family is built on an Arm Cortex-M33 core, running up to 240 MHz. It offers up to 2 MB Flash, 640 KB RAM, and connectivity interfaces including UART, I²C, I3C, SPI, CAN FD, High-Speed USB, and FlexIO. Along with support from NXP’s FRDM development boards, the MCX A5 family is supported by the MCUXpresso developer ecosystem, including Rust support, comprehensive SDKs, Visual Studio Code integration, and LTS software releases. The MCX A5 family is sampling now.

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