{"id":36258,"date":"2026-08-06T12:27:10","date_gmt":"2026-08-06T12:27:10","guid":{"rendered":"https:\/\/www.europesays.com\/netherlands\/36258\/"},"modified":"2026-08-06T12:27:10","modified_gmt":"2026-08-06T12:27:10","slug":"celus-variscite-and-nxp-join-forces-to-streamline-embedded-ai-hardware-design-2","status":"publish","type":"post","link":"https:\/\/www.europesays.com\/netherlands\/36258\/","title":{"rendered":"CELUS, Variscite, and NXP Join Forces to Streamline Embedded AI Hardware Design"},"content":{"rendered":"

CELUS has partnered with Variscite and NXP Semiconductors to integrate AI-assisted hardware design capabilities into embedded system development, enabling engineers to move from concept to production more quickly using a unified design environment.<\/p>\n

The collaboration brings Variscite\u2019s system-on-module (SoM) portfolio to the CELUS Design Platform while extending support through the NXP Block Diagram Designer powered by CELUS. The initiative reflects a broader trend toward AI-assisted electronic design automation (EDA), where intelligent software helps reduce manual engineering effort and shortens product development cycles.<\/p>\n

The integration allows engineers to architect and refine embedded systems around NXP-based SoMs within a single workflow, helping accelerate hardware design for industrial automation, medical devices, and IoT applications.<\/p>\n

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A key aspect of the partnership is Variscite\u2019s long-standing collaboration with NXP. By incorporating Variscite\u2019s modules directly into the NXP Block Diagram Designer, engineers can select SoMs, develop hardware architectures, and prepare designs for implementation without switching between multiple development environments.<\/p>\n

\u201cTime-to-market is a critical factor in any new project,\u201d said Ofer Austerlitz, vice president of business development and sales at Variscite, in a statement. \u201cPairing Variscite\u2019s leading NXP-based SoM solutions with CELUS\u2019 design platform simplifies development and shortens the path from concept to a working prototype and successful mass production.\u201d<\/p>\n

The initial release supports the VAR-SOM-MX93, VAR-SMARC-MX8M-PLUS, and DART-MX95 system-on-modules, with additional carrier board reference projects and expanded platform integration planned. Engineers can also leverage the CELUS AI Design Assistant to automate portions of the hardware design process and accelerate implementation.<\/p>\n

\u201cAs we continue to expand the foundation of the NXP Block Diagram Designer, having key partners such as Variscite embrace the platform and provide solutions that our NXP customers can use is the primary focus of our efforts,\u201d said Luca DiFalco, senior vice president of global channel sales and industrial solutions at NXP. \u201cOur goal is simple: use the NXP Block Diagram Designer to start and finish your design journey in one effort on one platform.\u201d<\/p>\n

The announcement underscores a growing industry movement toward AI-powered hardware development platforms that combine component selection, system architecture, and design automation into a unified workflow. Such platforms aim to reduce engineering complexity while helping developers bring increasingly sophisticated embedded AI systems to market faster.<\/p>\n

\u201cThe focus of this partnership is to provide engineers with a clear path from concept to working prototype\/production-ready hardware,\u201d Tobias Pohl, CEO and co-founder of CELUS, said in a press statement. \u201cBy leveraging the CELUS Design Platform and our AI Design Assistant capabilities, we are ensuring a highly efficient and effective design journey. Having a technology leader like Variscite on the platform and making their products accessible through ecosystem touchpoints like the NXP Block Diagram Designer gives engineers of all backgrounds the opportunity to design and build with best-in-class products.\u201d<\/p>\n","protected":false},"excerpt":{"rendered":"CELUS has partnered with Variscite and NXP Semiconductors to integrate AI-assisted hardware design capabilities into embedded system development,…\n","protected":false},"author":2,"featured_media":36259,"comment_status":"","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[62],"tags":[23400,166,11747],"class_list":["post-36258","post","type-post","status-publish","format-standard","has-post-thumbnail","category-nxp","tag-celus","tag-nxp","tag-variscite"],"_links":{"self":[{"href":"https:\/\/www.europesays.com\/netherlands\/wp-json\/wp\/v2\/posts\/36258","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.europesays.com\/netherlands\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.europesays.com\/netherlands\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.europesays.com\/netherlands\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/www.europesays.com\/netherlands\/wp-json\/wp\/v2\/comments?post=36258"}],"version-history":[{"count":0,"href":"https:\/\/www.europesays.com\/netherlands\/wp-json\/wp\/v2\/posts\/36258\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.europesays.com\/netherlands\/wp-json\/wp\/v2\/media\/36259"}],"wp:attachment":[{"href":"https:\/\/www.europesays.com\/netherlands\/wp-json\/wp\/v2\/media?parent=36258"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.europesays.com\/netherlands\/wp-json\/wp\/v2\/categories?post=36258"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.europesays.com\/netherlands\/wp-json\/wp\/v2\/tags?post=36258"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}