Chinese scientists have produced what they claim is the world’s first ultra-high-parallel optical computing integrated chip, delivering a theoretical 2,560 tera-operations per second (TOPS) at a 50 GHz optical clock rate.
According to CGTN, the device was built at the Shanghai Institute of Optics and Fine Mechanics (SIOM) under the Chinese Academy of Sciences and is described this week in the journal eLight.
100-wavelength architecture boosts speed without raising frequency
Conventional optical processors typically move information on a single color or wavelength of light. SIOM’s design instead divides a laser into more than one hundred distinctly colored channels, all traveling through the same fingernail-sized chip simultaneously.
Project leader Xie Peng likens it to replacing a single-lane road with a hundred-lane expressway, which means that data throughput soars even though the physical footprint and clock speed stay the same.
The trick is made possible by soliton microcomb sources, tiny ring-shaped resonators that split a continuous laser into a series of evenly spaced spectral “teeth.” Each tooth carries an independent stream of bits.
Because light does not suffer the resistive heating that plagues electronic circuits, the parallel lanes can run side by side with minimal energy loss and little risk of thermal bottlenecks.
SIOM reports an optical bandwidth wider than 40 nm, low insertion loss, and fully reconfigurable routing, enabling the chip to tackle tasks ranging from image recognition to real-time signal processing.
Potential uses in artificial intelligence and drone swarms
Researchers say the high degree of on-chip parallelism could give artificial intelligence models a power-efficient alternative to today’s graphics-processing units. Neural networks, which rely on many identical mathematical operations, map naturally onto the chip’s multi-lane structure.
Low latency also makes the technology attractive for edge devices, everything from high-frequency trading servers to drone swarms, where milliseconds count and power budgets are tight.
Beyond AI, the architecture may speed up physics simulations, medical imaging, and other data-heavy workloads that struggle on purely electronic hardware. Han Xilin, an engineer on the project, emphasizes that none of these gains required shrinking features or raising the clock: “We increased the number of lanes, not the speed limit,” he said in remarks reported by CGTN.
Similar breakthrough: pilot line for lithium-niobate photonic chips
While SIOM’s advance centers on an experimental architecture, a different Chinese team reached a manufacturing milestone last week. Shanghai Jiao Tong University’s Chip Hub for Integrated Photonics Xplore (CHIPX) announced the start-up of China’s first pilot production line for thin-film lithium-niobate (TFLN) photonic chips.
SCMP reports that the six-inch wafers already demonstrate modulation bandwidths above 110 GHz, low optical loss, and weekly iteration cycles, which are typically required far longer in prototype labs.
CHIPX director Jin Xianmin said the line took fifteen years of materials and process development to complete. Though Europe and the United States opened smaller photonic fabs earlier, the Chinese facility’s use of brittle but high-performance lithium niobate, and its capacity of 12,000 wafers per year- marks a significant step toward large-scale photonic manufacturing on the mainland.
Both announcements highlight the fast pace of optical chip research and production in China this month. Yet each stands on its own: SIOM’s multi-wavelength processor breaks new ground in parallel photonic computing, whereas CHIPX’s pilot line focuses on bringing a different class of photonic devices to market. Together, they add momentum to a field racing to move more information with less electricity, this time, quite literally, at the speed of light.