{"id":30602,"date":"2025-04-18T15:58:15","date_gmt":"2025-04-18T15:58:15","guid":{"rendered":"https:\/\/www.europesays.com\/uk\/30602\/"},"modified":"2025-04-18T15:58:15","modified_gmt":"2025-04-18T15:58:15","slug":"reversible-computing-escapes-the-lab","status":"publish","type":"post","link":"https:\/\/www.europesays.com\/uk\/30602\/","title":{"rendered":"Reversible Computing Escapes the Lab"},"content":{"rendered":"

Michael Frank<\/a> has spent his career as an academic researcher working over three decades in a very peculiar niche of computer engineering. According to Frank, that peculiar niche\u2019s time has finally come. \u201cI decided earlier this year that it was the right time to try to commercialize this stuff,\u201d Frank says. In July 2024, he left his position as a senior engineering scientist at Sandia National Laboratories to join a startup, U.S. and U.K.-based Vaire Computing<\/a>.\n<\/p>\n

\n\tFrank argues that it\u2019s the right time to bring his life\u2019s work\u2014called
\n\treversible computing<\/a>\u2014out of academia and into the real world because the computing industry is running out of energy. \u201cWe keep getting closer and closer to the end of scaling energy efficiency<\/a> in conventional chips,\u201d Frank says. According to an IEEE semiconducting industry road map report<\/a> Frank helped edit, by late in this decade the fundamental energy efficiency of conventional digital logic is going to plateau, and \u201cit\u2019s going to require more unconventional approaches like what we\u2019re pursuing,\u201d he says.\n<\/p>\n

\n\tAs Moore\u2019s Law
\n\t stumbles<\/a> and its energy-themed cousin Koomey\u2019s Law<\/a> slows, a new paradigm might be necessary to meet the increasing computing demands of today\u2019s world. According to Frank\u2019s research<\/a> at Sandia, in Albuquerque, reversible computing<\/a> may offer up to a 4,000x energy-efficiency gain compared to traditional approaches.\n<\/p>\n

\n\t\u201cMoore\u2019s Law has kind of collapsed, or it\u2019s really slowed down,\u201d says
\n\tErik DeBenedictis<\/a>, founder of Zettaflops, who isn\u2019t affiliated with Vaire. \u201cReversible computing is one of just a small number of options for reinvigorating Moore\u2019s Law, or getting some additional improvements in energy efficiency.\u201d\n<\/p>\n

\n\tVaire\u2019s first prototype, expected to be fabricated in the first quarter of 2025, is less ambitious\u2014it is producing a chip that, for the first time, recovers energy used in an arithmetic circuit. The next chip, projected to hit the market in 2027, will be an energy-saving processor specialized for AI inference. The 4,000x energy-efficiency improvement is on Vaire\u2019s road map but probably 10 or 15 years out.\n<\/p>\n

\n\t\u201cI feel that the technology has promise,\u201d says
\n\tHimanshu Thapliyal<\/a>, associate professor of electrical engineering<\/a> and computer science at the University of Tennessee, Knoxville, who isn\u2019t affiliated with Vaire. \u201cBut there are some challenges also, and hopefully, Vaire Computing will be able to overcome some of the challenges.\u201d\n<\/p>\n

What Is Reversible Computing?<\/p>\n

\n\tIntuitively, information may seem like an ephemeral, abstract concept. But in 1961, Rolf Landauer at IBM
\n\t<\/a> discovered<\/a> a surprising fact: Erasing a bit of information in a computer necessarily costs energy, which is lost as heat. It occurred to Landauer that if you were to do computation without erasing any information, or \u201creversibly,\u201d you could, at least theoretically, compute without using any energy at all.\n<\/p>\n

\n\tLandauer himself considered the idea
\n\timpractical<\/a>. If you were to store every input and intermediate computation result, you would quickly fill up memory with unnecessary data. But Landauer\u2019s successor, IBM\u2019s Charles Bennett<\/a>, discovered<\/a> a workaround for this issue. Instead of just storing intermediate results in memory, you could reverse the computation, or \u201cdecompute,\u201d once that result was no longer needed. This way, only the original inputs and final result need to be stored.\n<\/p>\n

\n\tTake a simple example, such as the exclusive-OR, or XOR gate. Normally, the gate is not reversible\u2014there are two inputs and only one output, and knowing the output doesn\u2019t give you complete information about what the inputs were. The same computation can be done reversibly by adding an extra output, a copy of one of the original inputs. Then, using the two outputs, the original inputs can be recovered in a decomputation step.\n<\/p>\n

\"AnA traditional exclusive-OR (XOR) gate is not reversible\u2014you cannot recover the inputs just by knowing the output. Adding an extra output, just a copy of one of the inputs, makes it reversible. Then, the two outputs can be used to \u201cdecompute\u201d the XOR gate and recover the inputs, and with it, the energy used in computation.<\/p>\n

\n\tThe idea kept gaining academic traction, and in the 1990s, several students working under MIT\u2019s
\n\t Thomas Knight<\/a> embarked on a series<\/a> of proof-of-principle<\/a> demonstrations of reversible computing chips. One of these students was Frank. While these demonstrations showed that reversible computation was possible, the wall-plug power usage was not necessarily reduced: Although power was recovered within the circuit itself, it was subsequently lost within the external power supply. That\u2019s the problem that Vaire set out to solve.\n<\/p>\n

Computing Reversibly in CMOS<\/a><\/p>\n

\n\tLandauer\u2019s limit gives a theoretical minimum for how much energy information erasure costs, but there is no maximum. Today\u2019s CMOS implementations use more than a thousand times as much energy to erase a bit than is theoretically possible. That\u2019s mostly because transistors<\/a> need to maintain high signal energies for reliability, and under normal operation that all gets dissipated as heat.\n<\/p>\n

\n\tTo avoid this problem, many alternative physical implementations of reversible circuits have been considered, including
\n\t superconducting computers<\/a>, molecular machines<\/a>, and even living cells<\/a>. However, to make reversible computing practical, Vaire\u2019s team is sticking with conventional CMOS techniques. \u201cReversible computing is disrupting enough as it is,\u201d says Vaire chief technology officer and cofounder Hannah Earley<\/a>. \u201cWe don\u2019t want to disrupt everything else at the same time.\u201d\n<\/p>\n

\n\tTo make CMOS play nicely with reversibility, researchers had to come up with clever ways to to recover and recycle this signal energy. \u201cIt\u2019s kind of not immediately clear how you make CMOS operate reversibly,\u201d Earley says.\n<\/p>\n

\n\tThe main way to reduce unnecessary heat generation in transistor use\u2014to operate them adiabatically\u2014is to ramp the control voltage slowly instead of jumping it up or down abruptly. This can be done without adding extra compute time, Earley argues, because currently transistor switching times are kept comparatively slow to avoid generating too much heat. So, you could keep the switching time the same and just change the waveform that does the switching, saving energy. However, adiabatic switching does require something to generate the more complex ramping waveforms.\n<\/p>\n

\n\tIt still takes energy to flip a bit from 0 to 1, changing the gate voltage on a transistor from its low to high state. The trick is that, as long as you don\u2019t convert energy to heat but store most of it in the transistor itself, you can recover most of that energy during the decomputation step, where any no-longer-needed computation is reversed. The way to recover that energy, Earley explains, is by embedding the whole circuit into a resonator.
\n<\/a><\/p>\n

\n\tA resonator is kind of like a swinging pendulum. If there were no friction from the pendulum\u2019s hinge or the surrounding air, the pendulum would swing forever, going up to the same height with each swing. Here, the swing of the pendulum is a rise and fall in voltage powering the circuit. On each upswing, one computational step is performed. On each downswing, a decomputation is performed, recovering the energy.\n<\/p>\n

\n\tIn every real implementation, some amount of energy is still lost with each swing, so the pendulum requires some power to keep it going. But Vaire\u2019s approach paves the way to minimizing that friction. Embedding the circuit in a resonator simultaneously creates the more complex waveforms needed for adiabatic transistor switching and provides the mechanism for recovering the saved energy.\n<\/p>\n

The Long Road to Commercial Viability<\/p>\n

\n\tAlthough the idea of embedding reversible logic inside a resonator has been developed before, no one has yet built one that integrates the resonator on chip with the computing core. Vaire\u2019s team is hard at work on their first version of this chip. The simplest resonator to implement, and the one the team is tackling first, is an inductive-capacitive (LC) resonator, where the role of the capacitor is played by the whole circuit and an on-chip inductor serves to keep the voltage oscillating.\n<\/p>\n

\n\tThe chip Vaire plans to send for fabrication in early 2025 will be a reversible adder embedded in an LC resonator. The team is also working on a chip that will perform the multiply-accumulate operation, the basic computation in most machine learning<\/a> applications. In the following years, Vaire plans to design the first reversible chip specialized for AI inference.\n<\/p>\n

\n\t\u201cSome of our early test chips might be lower-end systems, especially power-constrained environments, but not long after that, we\u2019re addressing higher-end markets as well,\u201d Frank says.\n<\/p>\n

\n\tLC resonators<\/a> are the most straightforward way to implement in CMOS, but they come with comparatively low quality factors, meaning the voltage pendulum will run with some friction. The Vaire team is also working on integrating a
\n\tmicroelectromechanical systems<\/a> (MEMS<\/a>) resonator version, which is much more difficult to integrate on chip but promises much higher quality factors (less friction). Earley expects a MEMS-based resonator to eventually provide 99.97 percent friction-free operation.\n<\/p>\n

\n\tAlong the way, the team is designing new reversible logic gate architectures and electronic-design-automation tools for reversible computation. \u201cMost of our challenges will be, I think, in custom manufacturing and hetero-integration in order to combine efficient resonator circuits together with the logic in one integrated product,\u201d Frank says.\n<\/p>\n

\n\tEarley hopes that these are challenges the company will overcome. \u201cIn principle, this allows [us], over the next 10 to 15 years, to get to 4,000x improvement in performance,\u201d she says. \u201cReally it is going to be down to how good a resonator you can get.\u201d\n\t<\/p>\n

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