Samsung Electronics is preparing to unveil its next-generation 3D memory and storage roadmap designed to resolve performance bottlenecks in AI systems. The centerpiece is “zHBM” technology, which vertically stacks HBM (High Bandwidth Memory) directly on top of GPUs. SK Hynix is also entering the next-generation AI memory semiconductor race with its tiered memory system architecture.

According to industry sources on Monday, Samsung Electronics will showcase a broad range of 3D memory and storage technologies optimized for AI workloads at FMS (Future of Memory and Storage) 2026, the world’s largest memory and storage conference, running from Tuesday through Thursday at the Santa Clara Convention Center in California. Lee Jin-yeop, Executive Vice President and Head of Flash Development at Samsung Electronics’ Memory Business Unit, and Kim Kyung-ryun, Managing Director of the DRAM Development Office, will deliver keynote addresses at the event.

“Samsung Electronics will redefine AI systems through 3D memory and storage innovation at FMS 2026,” a company spokesperson said. “We will introduce next-generation HBM and V-NAND (vertical NAND flash) technologies optimized for AI workloads.” Industry observers widely expect the company to debut “zHBM,” its next-generation HBM applying 3D stacking technology, for the first time at this event.

zHBM represents an entirely new memory architecture that stacks HBM vertically on top of GPUs. First unveiled by Samsung Electronics at Semicon Korea in February, the technology dramatically shortens data travel distances compared to the conventional side-by-side arrangement of GPU and HBM, simultaneously boosting bandwidth and power efficiency.

Song Jae-hyuk, Samsung Electronics’ CTO, emphasized at the time: “zHBM’s data transfer speed is four times faster than HBM4, while power consumption is only one-quarter of the level. We will achieve another major innovation in bandwidth and power efficiency.”

In the NAND segment, “z-NAND” is being positioned as the next-generation strategic product. Traditionally, GPUs must route through CPUs and DRAM to access data stored on SSDs, creating inevitable latency. z-NAND focuses on minimizing latency and enhancing I/O performance to reduce these bottlenecks.

At last year’s FMS, Samsung Electronics announced it was developing z-NAND with the goal of achieving 15 times the processing performance of conventional NAND while reducing power consumption to one-fifth. Industry analysts view 3D architectures as the next-generation solution to AI system bottlenecks, as reducing inter-chip data travel distances improves bandwidth and power efficiency. The rapid growth in data processing demand, driven by the shift from generative AI to agentic AI and physical AI, is also amplifying the importance of 3D architectures.

“As AI workloads evolve, the volume of data and context requiring processing grows exponentially, making it increasingly difficult to improve performance and power efficiency with conventional compute-centric architectures alone,” an industry official explained. “3D memory and storage technologies like zHBM and z-NAND represent an attempt to build memory-centric AI infrastructure by reducing data movement between compute units and memory while simultaneously expanding performance and capacity.”

CategoryzHBMz-NANDArchitectureHBM vertically stacked on GPUVertically stacked NAND flashKey BenefitsMinimized data travel distance, improved bandwidth and power efficiencyMinimized latency, enhanced I/O performanceTarget Performance4x transfer speed vs. HBM4, 1/4 power consumption15x processing performance vs. conventional NAND, 1/5 power consumption

Note: Based on target figures announced by Samsung Electronics.

Meanwhile, rival SK Hynix is also countering at FMS 2026 with a tiered memory system built on xPU (compute processing units), HBF (High Bandwidth Flash), and CXL (Compute Express Link). Kim Cheon-seong, Vice President and Head of SK Hynix’s Solution Development Division, and Kang Uk-seong, Vice President of Next-Generation Product Planning, are scheduled to deliver a keynote on “Efficient AI Infrastructure Orchestration Through Tiered Memory in the Agentic AI Era.”

This year’s event is expected to demonstrate that competition in the AI semiconductor market is shifting from raw performance to “system architecture” innovation. As the data movement bottleneck between GPUs and memory emerges as the critical variable determining overall AI system performance, memory semiconductor companies’ technological capabilities have become decisive factors in AI infrastructure success. All eyes are now on how the 3D memory technologies from Samsung Electronics and SK Hynix will reshape the competitive landscape of the AI semiconductor market.